IE component design

NATIONAL INSTITUTE OF INDUSTRIAL ENGINEERING

PGDIE-42

INDUSTRIAL ENGINEERING

ASSIGNMENT

Selected Component: DIODE (Electronics)

     SUBMITTED BY:

ANKITA CHAUHAN (14)

                                                                                       JAYANT PATWARE (38)

                                                                                              

1)    Write down its design process and come out with a design (Assume the required data)

 Fabrication Technology

1.      Introduction

2.      Fabrication processes

a.       Thermal

b.      Oxidation

c.       Etching techniques

d.      Diffusion

3.      Expressions for diffusion of dopant concentration

4.      Ion implantation

5.      Photomask generation

6.      Photolithography

7.      Epitaxial growth

8.      Metallization and interconnections,

9.      Ohmi ccontacts

10.  Planar PN junction diode fabrication,

11.  Fabrication of resistors and capacitors in IC's.

1. INTRODUCTION

·         The microminiaturization of electronics circuits and systems and then concomitant application to computers and communications represent major invasions of the twentieth century. These have led to the introduction of new applications that were not possible with discrete devices.

·         Integrated circuits on a single silicon wafer followed by the increase of the size of the wafer to accommodate many more such circuits served to significantly reduce the costs while increasing there liability of these circuits.

·        

1.    Silicon From Sand

                       

2.    Fabrication Process

a.     Oxidation

 The process of oxidation consists of growing a thin film of silicon dioxide on the surface of the silicon wafer.

Silicon dioxide, as we shall see later, plays an important role in shielding of the surface so that dopant atoms, by diffusion or ion implantation, may be driven into other selected regions

b.    Diffusion

This process consists of the introduction of a few tenths to several micrometers of impurities by the solid-state diffusion of dopants into selected regions of a wafer to form junctions.

c.      Ion Implantation

This is a process of introducing dopants into selected areas of the surface of the wafer by bombarding the surface with high-energy ions of the particular dopant.

d.     Photolithography

In this process, the image on the reticle is transferred to the surface of the wafer.

e.      Epitaxy

Epitaxy is the process of the controlled growth of a crystalline doped layer of silicon on a single crystal substrate.

f.      Metallization and interconnections

After all semiconductor fabrication steps of a device or of an integrated circuit are

completed, it becomes necessary to provide metallic interconnections for the integrated circuit and for external connections to both the device and to the IC.

2. Design Assumming data of planer PN junction diode

1.            An N+ substrate grown by the Czochralski process is the starting metal of approximately 150μm thick.

2.            A layer of N-type silicon (1-5μm) is grown on the substrate by epitaxy.

3.            Silicondioxide layer deposited by oxidation.

4.            Surface is coated with photoresist (positive).

5.            Mask is placed on surface of silicon, aligned, and exposed to UV light.

6.            Mask is removed, resist is removed, and SiOz under the exposed resist is etched.

7.            Boron is diffused to form Pregion.Boron diffuses easily in silicon but noting SiO2

8.            Thin aluminum film is deposited over surface.

9.            Metallized area is covered with resist and an other mask isused to identify areas where metal is to be preserved.Wafer is etched to remove unwanted metal.Resist is then dissolved.

10.        Contact metal is deposited on the back surface and ohmic contacts are made by heat treatment.

3. Supply Chain at chip level

Presently, most of the raw and intermediate materials used in the LED packaging process are imported. If the intermediate material is purchased locally, the supplier company that is operating locally has imported the raw material to add value

Materials used in LED Packaging

·         Wafer

·         Lead frame

·         Single sided PCB

·         Gold wire

·         Ceramic substrate

·          Aluminium substrate

·         Epoxy / silicone

Although some of the materials may be available locally, companies are importing pricing and meeting specifications and requirement

4. Manufacturing process of diode

1.      Die Bond: when semiconductor chip is attached to the substrate

2.      Wire Bond: where internal connections of diode is made

3.      Modelling: to protect the chip from internal connections

4.      Marking: using laser marking code on the tab

5.      Slicing: cutting the finished die into individual pieces

6.      Test and Tapping: each die tested individually and put on the tap reel

7.      Testing Equipment: reliability test for customer satisfaction

8.      Measure microscopic9.                                  

Process	Control item	Control point
Purchase of material   wafer                      Diffusion                      Film thickness                                     Inspection mask Photolithography Inspection Metallization                    PQC         Scribbling Chip inspection Pallet washing PQC Lead glass Assembling Sealing Soldering PQC Screening Total electrical Inspection PQC Marking Taping & packing Shipment Inspection Warehouse                                shipping	Type no. Film thickness, resistivity Appearance of wafer Film thickness Appearance of wafer Appearance of chip Type no. Appearance , solder thickness Electrical characteristics failure analysis Assurance of tapping Electrical characteristic appearance	Part confirmation Assurance of basic film thickness Scratch and position deviation Monitor scratch and metallization Selection of good / bad chip Part confirmation Appearance of outline Feedback of analysis information

References

1. http://www.renesas.com

2. Comchip technology’s flat chip diode manufacturing process

3. Fabrication technology by B.G. Balagangadhar (Ghousia college of enggineering)

Paper 1: PN-DIODE TRANSDUCED 3.7-GHZ SILICON RESONATOR

Summary: We present in this paper the design and fabrication of a homogeneous silicon micromechanical resonator actuated using forces acting on the immobile charge in the depletion region of a symmetrically doped pndiode. The proposed resonator combines the high quality factor (Q) of airgap transduced resonators with the frequency scaling benefits of internal dielectrically transduced resonators. Using this transduction method, we demonstrate a thickness longitudinal mode micromechanical resonator with Q ~ 18,000 at a resonant frequency of 3.72 GHz, yielding an f·Q product of 6.69 x 1013, which is close to the intrinsic f·Q product of 1014 for (100)-Si.

This work combines the pioneering work of and to develop a micromechanical resonator with the benefits of high quality factor at GHz frequencies. This is made possible by the use of pn-diode transduction, which allows efficient transduction at high frequencies without using a separate transducer material. Using this method, we present a thickness longitudinal mode micromechanical resonator with resonant frequency of 3.72 GHz and an f·Q product of 6.69 x 1013. This is close to the theoretical limit in (100)-Si of ~1014. In addition, the proposed device results in a CMOS-compatible fabrication process and higher device yield as compared to traditional air-gap or dielectrically transduced resonators.

References: PN-DIODE TRANSDUCED 3.7-GHZ SILICON RESONATOR

Eugene Hwang and Sunil A. Bhave

Cornell University, Ithaca, NY, USA